day_2_10-15-2015

Let's start with the NMOS device seen below.

Recall the long channel transistor model, also know as the square law model.

If $V_{DS} < (V_{GS}-V_{TH})$ and $V_{GS}>V_T$ this is called the linear or triode region.

In this mode of operation, the drain current increases linearly with $V_{GS}$.

\[I_D=KP_n\frac{W}{L}\left [\left ( V_{GS}-V_T \right ) V_{DS}-\frac{1}{2}V_{DS}^{2} \right ]\]

If $V_{DS} > (V_{GS}-V_{TH})$ and $V_{GS}>V_T$, the device is said to be operating in saturation or square law mode.

The drain current increases as the square of the gate to source voltage.

\[I_D=\frac{1}{2}KP_n\frac{W}{L}\left ( V_{GS}-V_T \right )^2(1 + \lambda(V_{DS}-V_{DS,SAT}))\]

$V_{DS,SAT}= V_{GS} - V_T$.

Before one can use the model shown above, we need to extract the model parameters $KP_n$, $V_T$, and $\lambda$.

Let's start by extracting $KP_n$ and Vt for a long channel device. If we make L large, $\lambda$ the channel length modulation parameter goes to 0.

\[I_D=\frac{1}{2}KP_n\frac{W}{L}\left ( V_{GS}-V_T \right )^2\]

Taking the square root of both sides yields:

\[\sqrt{I_D}=\sqrt{\frac{1}{2}KP_n\frac{W}{L}}*(V_{GS}-V_T)\]

The above equation is just a straight line, so the math is easier to work with. To get $KP_n$ and $V_T$, just solve the two equations two unknowns from the model data. This is not the most physcally correect thing to do. The model does not follow the square law exactly due to secondary effects like mobility degredation and series resistance. Atleast for DC operating point problems this will make the hand calculations the most accurate.

I used values of $V_{GS}$=1.5 and $V_{GS}=4.0$ to generate the model seen below. $KP_n$=7.64e-5 and $V_T$=0.602

The red line is the SPICE model and the blue line is the square-law model that was just extracted.

day_2_10-15-2015.txt · Last modified: 2015/10/28 06:59 by admin